XBOX360 NandPro3.0a 낸드 덤프툴

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XBOX360 NandPro3.0a 낸드 덤프툴

전설의게이머

2011-10-15 오후 11:17:16 Hit. 653

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Nandpro30a.rar

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http://www.xboxhacker.org/index.php?topic=17123.0

<DIV>===============================================================================<BR>    SUPPORTED DEVICE INTERFACES<BR>===============================================================================</DIV>
<DIV>USB:<BR> LPC2148 Olimex USB header board.<BR> High performance 16MB/2Mins.<BR> LibUsb driver.</DIV>
<DIV>LPT:<BR> Parallel Printer Port, SPP mode.<BR> Low performance, 16MB/35mins (cpu dependant).<BR> Dlportio printer port driver.</DIV>
<DIV>XSVF:<BR> Subset device of USB. <BR> LPC2148 Olimex USB header board required.<BR> NOT for nand programming. This command line device type is for flashing<BR>  .xsvf files to a Xilinx cpld.</DIV>
<DIV>POST:<BR> Subset device of USB. <BR> LPC2148 Olimex USB header board required.<BR> NOT for nand programming. This command line device type is for monitoring<BR>  Post codes only.</DIV>
<DIV>The included .hex file supports both Nand SPI flash, Xilinx Programming,<BR> and Post Monitor all at the same time.<BR>The mode selected ie: Nand Flash/Xsvf/PostMon is determined by the command line.<BR>Previous .hex files as well as the "pic" version of hardware will not work.</DIV>
<DIV>The Maximus "NANDFlasher" has an array of plated through holes to break out all<BR> the extra LPC2148 gpio. This product can be flashed with the new ArmV3.hex file<BR> for full comatibility with Nandpro. The wiring coordinates are included here for<BR> those who have this device. The included .jpg file shows the connections<BR> to flash this device with the Philips utility. An RS232 level shifter is also <BR> required for this purpose.</DIV>
<DIV>The Team Executor "NAND-X" can also be flashed with the ArmV3.hex, however the<BR> wiring connections may be difficult, and are not listed in this document.</DIV>
<DIV>===============================================================================<BR>    DRIVER AND HARDWARE INSTALLATION<BR>===============================================================================</DIV>
<DIV>USB Install:<BR> Flash the .hex file to the LPC2148 using the <BR>  "Philips LPC2000 FlashUtility" or equivalent.<BR> Connect LPC2148 to computer USB.<BR> Point "found new hardware" to the "custom.inf"<BR> Windows reports: "Your new hardware is ready to use"</DIV>
<DIV>USB Hardware:<BR> Connect only wires from EXT connectors to MAINBRD where indicated.<BR> Connect only wires from EXT connectors to Xilinx jtag connector where indicated.<BR> No resistors or diodes at all. For sure! Do not add them!</DIV>
<DIV>===============================================================================</DIV>
<DIV>LPT Install:<BR> Run the port95nt.exe application to install the DlPortio driver</DIV>
<DIV>LPT Hardware:<BR> Some parallel ports run at 3.3v others at 5v. The MAINBRD is 3.3 volts.<BR> <BR> It is recommend to use 100 ohm series saftey resistors (R)<BR>  for all lpt connections except for DB25.11 and DB25.18 (GND), as shown above.<BR> Testing with 5 volt lpt and NO resistors didn't burn anything up though. YMMV :P<BR> <BR> For DB25.11 connect diode exactly as shown. It is highly recommended to<BR>  connect the diode to the MAINBRD end rather than the PC end of the wire.<BR>  Preferred diode is BAT41 or other Schottkey switch diode with low forward voltage drop.<BR>  1N4148/53, 1N914, type switching diodes should be also be ok,<BR>  but are not quite as good. 1N400X are rectifiers and not good at all.<BR>  <BR> This solution isn't perfect but you typically dont leave it hooked up forever anyway.<BR> If someone wants to design and post a buffer circuit go right ahead. I can't be bothered ;)</DIV>
<DIV>===============================================================================<BR>    COMMAND LINE USAGE<BR>===============================================================================</DIV>
<DIV>NandPro v3.0a by Tiros</DIV>
<DIV><BR>Useage:</DIV>
<DIV>To invoke Nand SPI flasher use:<BR>NandPro dev: -r# Filename (HexStartBlock HexBlockCount) -]Read<BR>NandPro dev: -w# Filename (HexStartBlock HexBlockCount) -]Write<BR>NandPro dev: -e# (HexStartBlock HexBlockCount)          -]Erase</DIV>
<DIV>dev: Is hardware interface usb: or lpt:<BR>dev: Can also be a filename:, to be used as a 'Virtual Nand Device'<BR>     Virtual device config can be forced, by appending :HexConfigValue<BR># Is nand size (16, 64, 256, 512) in MegaBytes<BR>HexBlocks are optional range limits, default is entire device<BR>-r# Read saving file RAW (with SPARE)<BR>-R# Read saving file without SPARE<BR>!r# Read saving only the SPARE data<BR>-w# Write RAW (with SPARE) file<BR>+w# Write RAW (with SPARE) file, init SPARE, block numbers, ECC<BR>@w# Write RAW (with SPARE) file, init block numbers, ECC<BR>*w# Write RAW (with SPARE) file, init ECC<BR>+W# Write while ADDING SPARE from file without SPARE</DIV>
<DIV>To invoke Xilinx xsvf flasher use:<BR>NandPro xsvf: XsvfInputFilename.xsvf</DIV>
<DIV>To invoke usb post monitor use:<BR>NandPro post: PostLogFileName.txt<BR> <BR> <BR>===============================================================================<BR>===============================================================================<BR>    .XSVF CPLD CONNECTIONS AND OPERATION<BR>===============================================================================<BR>===============================================================================<BR>Follow instructions for USB install.<BR>Make the following connections from the LPC2148 to the Xilinx device<BR> Jtag conenctor:</DIV>
<DIV>ArmLpc  Jtag            Olimex          Maximus</DIV>
<DIV>3.3v    VCC             EXT2.24         M1<BR>GND     GND             EXT2.25         N3<BR>P0.17   TCK             EXT1.18         A2<BR>P0.18   TDO             EXT1.19         B3<BR>P0.19   TDI             EXT1.20         C1<BR>P0.20   TMS             EXT1.21         C2</DIV>
<DIV>Xilinx CPLD flashing typical command line:</DIV>
<DIV>Flash a .xsvf file, created by Impact, to cpld:<BR> Nandpro xsvf: filename.xsvf</DIV>
<DIV>General XSVF notes:<BR>LPT is not supported for this feature.  <BR>Requires additional connections from LPC2148 to the Xilinx jtag connector.<BR>The Xilinx Impact tool is used to create .xsvf files. The Xilinx Impact software<BR> records/redirects cpld operations into a binary file (.xsvf) that can be<BR> processed by Nandpro. IE: Nandpro does not flash .jed files, but .jed files<BR> may be directly converted to .xsvf by Impact.<BR> See the Xilinx Impact tool for more information.</DIV>
<DIV>===============================================================================<BR>===============================================================================<BR>    POST MONITOR CONNECTIONS AND OPERATION<BR>===============================================================================<BR>===============================================================================<BR>Follow instructions for USB install.<BR>The post connections require level shifting to 3.3 volts to be monitored.<BR>This will require an external circuit. The cpld can also be used for this purpose.</DIV>
<DIV>Flash cpld with nandpro:<BR> nandpro xsvf: SlimPlusPost.xsvf</DIV>
<DIV>The SlimPlusPost.xsvf is fully compatible with the existing released pinout with<BR> the exception of the DBG pin. The DBG pin has been relocated and now<BR> drives via open collector. The LED will remain off, and flash briefly<BR> on each reset attempt.</DIV>
<DIV>To connect an LED to the DBG pin:</DIV>
<DIV>3.3V---/\/\330/\/\---]|-------DBG 3 (37)</DIV>
<DIV><BR>Make the following connections from the LPC2148 to the cpld<BR> level shifter outputs:<BR> <BR>ArmLpc  Post    Olimex          Maximus         CPLD Out (CMOD)</DIV>
<DIV>P1.16   Post0   EXT2.5          L1                      38 (28)<BR>P1.17   Post1   EXT2.6          J2                      37 (27)<BR>P1.18   Post2   EXT2.7          I1                      36 (26)<BR>P1.19   Post3   EXT2.8          G3                      34 (25)<BR>P1.20   Post4   EXT2.9          A1                      33 (24)<BR>P1.21   Post5   EXT2.10         D3                      32 (23)<BR>P1.22   Post6   EXT2.11         E1                      31 (22)<BR>P1.23   Post7   EXT2.12         G1                      30 (18)</DIV>
<DIV><BR>Make the following connections from the main board post outputs to the<BR> cpld level shifter inputs:</DIV>
<DIV>Mbrd                    CPLD<BR>Post Out                In (CMOD)</DIV>
<DIV>Post0                   39 (29)<BR>Post1                   40 (30)<BR>Post2                   41 (31)<BR>Post3                   42 (32)<BR>Post4                   43 (33)<BR>Post5                   44 (34)<BR>Post6                   1  (35)<BR>Post7                   2  (36)</DIV>
<DIV><BR>Post monitor typical command line:<BR> Nandpro post: PostLog.txt</DIV>
<DIV>General post monitoring notes:<BR>LPT is not supported for this feature.  <BR>Post changes will be displayed on the command line and logged to the<BR> specified filename as a text file.<BR>The log file will be over written on each run.<BR>Pressing any key will break the post monitor loop.</DIV>
<DIV>===============================================================================<BR>===============================================================================<BR>    NAND FLASHING CONNECTIONS AND OPERATION<BR>===============================================================================<BR>===============================================================================<BR>Seven connections must be made from MAINBRD to the HW device interface.<BR> MAINBRD connects as specified to either Olimex board, or a PC printer port.</DIV>
<DIV>ArmLpc  Olimex          LPT                             MAINBRD</DIV>
<DIV>SS      EXT1-3          DB25.1  --R---  J1D2.2<BR>MISO    EXT1-6          DB25.11 --]|--  J1D2.4  Diode, observe polarity!<BR>P0.28   EXT2-1          DB25.16 --R---  J2B1.6<BR>GND     EXT1-26         DB25.18 ------  J1D2.6  or      J2B1.12<BR>MOSI    EXT1-7          DB25.14 --R---  J1D2.1<BR>SCK     EXT1-5          DB25.2  --R---  J1D2.3                  <BR>P0.29   EXT2-2          DB25.17 --R---  J2B1.5</DIV>
<DIV> Make connections to MAINBRD and run the app.<BR> MAINBRD needs to be plugged in to AC power.<BR> Actually powered on or not does not matter.<BR> While running NandPro application reset will occur.<BR> After nand operation is complete, reset will be released.</DIV>
<DIV>Nand flashing typical command line:</DIV>
<DIV>Read entire 16M flash, including SPARE:<BR> NandPro dev: -r16 nand.bin</DIV>
<DIV>Write entire 16M flash, including SPARE:<BR> NandPro dev: -w16 nand.bin</DIV>
<DIV>Advanced command line examples:</DIV>
<DIV>Read encrypted key vault with SPARE:<BR>nandpro dev: -r16 rawkv.bin 1 1</DIV>
<DIV>Read encrypted key vault from a "Virtual Nand" dev:, named vnand.bin, with SPARE :<BR>nandpro vnand.bin: -r16 rawkv.bin 1 1</DIV>
<DIV>Write encrypted key vault:<BR>nandpro dev: -w16 rawkv.bin 1 1</DIV>
<DIV>Flash a xell.bin compiler output (no SPARE) to block 40, adding SPARE while flashing:<BR>nandpro dev: +W16 xell.bin 40</DIV>
<DIV>Read config block from a "Virtual Nand", named vnand.bin, without SPARE:<BR>nandpro vnand.bin: -R16 configblk.bin 0x??? 1</DIV>
<DIV>Write above config block to dev: adding the SPARE back in:<BR>nandpro dev: +W16 configblk.bin 0x??? 1</DIV>
<DIV>Write a "small" python.ECC file to "full size" "Virtual Nand" :<BR>nandpro vnand.bin: -w16 python.ECC</DIV>
<DIV>Write to a dev:, from another RAW file, fixing ECC while writing:<BR>nandpro dev: -w16 DumpWithErrors.bin</DIV>
<DIV><BR>General nand flashing notes:</DIV>
<DIV>SPARE is the 16 bytes following a data block.</DIV>
<DIV>ECC is 26 bits located within the spare area.</DIV>
<DIV>Block numbers are also contained in spare area.</DIV>
<DIV>Reading and writing defaults to the entire device.<BR>The start block argumnet is optional and dictates the starting block to program.<BR>The ending block is also optional, and end if no block is specified, programming will<BR> continue until end of file or end of specified nand size.</DIV>
<DIV>Large block nands have different SPARE format than small block nands.<BR>The software uses the detected device's SPARE format for all (+) write operations.<BR>Files written RAW (-) are not translated in any way.</DIV>
<DIV>The "nand size" argument only sets the limit of available blocks for device operations.<BR> It is not hardware related, and need not exactly match the true device.<BR> <BR>There is no need to erase before programming.</DIV>
<DIV>You can hex edit a block, and use Nandpro to fix its ECC when you write it back.</DIV>
<DIV>The "Case" of the command generally indicates if I/O file will contain SPARE or not<BR> Upper Case:     No SPARE<BR> Lower Case:     RAW (with SPARE)</DIV>
<DIV>The "Virtual Nand" file can be read or be programmed, as if it where a device.<BR>The "Virtual Nand" file must be a raw file, containing SPARE.<BR>This can be used to extract or inject data from\to an existing raw dump.<BR>Example: To inject a "small" python image into an existing<BR> "full size" image, or to extract individual blocks from an existing raw dump.</DIV>
<DIV>Note:<BR>For the vnand: device the flash config is normally automatically detected.<BR>Some "hybrid" 256/512 images can not be detected properly, to mount these files the config<BR> value must be forced by specifying it as the last argument on the command line, preceeded by a ':'.<BR>Only vnand: device may be forced!</DIV>
<DIV>Example:<BR>nandpro vnand.bin: -r64 rawkv.bin 1 1 :AA3020</DIV>
<DIV><BR>READING WILL OVER-WRITE AN EXISTING FILE WITHOUT WARNING!<BR>NEW LOG FILE WILL OVERWRITE OLD WITHOUT WARNING!</DIV>
<DIV>DO NOT LEAVE LPT CABLE CONNECTED WHEN CONSOLE DOES NOT HAVE AC POWER!</DIV>
<DIV>===============================================================================<BR>    HISTORY<BR>===============================================================================<BR>//<BR>//2.0<BR>//Initial Release<BR>//<BR>//2.0a<BR>//Fixed usage for +W, +w<BR>//Fixed problem with payload injection for large block nands<BR>//Fixed miscalc of file blocks togo when injecting !raw<BR>//No ARM code impact<BR>//<BR>//<BR>//2.0b<BR>//Remove "Press Any Key" for unattended batch file processing<BR>//Removed retry on individual sectors, retry entire block instead, including erase<BR>// attempt to program all sectors anyway, then report status<BR>//ARM code update required for above<BR>//Added ARM HW version test, (U32) 0000 0001 required or abort<BR>//Added "Virtual Nand" device<BR>//<BR>//<BR>//2.0c<BR>//Bit settling verify feature added for LPT reading<BR>//Add support for Jasper16a<BR>//Improved detection for virtual nand device, fixes some problems with writing to vnand.<BR>//Allways corrects the ECC bytes (but not SPARE), even in raw mode<BR>// ie: A raw file that has been hex edited can simply be flashed with -w<BR>//<BR>//Added command line swithces<BR>//%r will read SPARE data only, 16 bytes per block<BR><A>//@w</A> will write RAW file, while correcting block numbers<BR>//Can "force" a flash config on command line by appending :HexFlashConfig<BR>//<BR>//2.0d<BR>//For compatibility purposes -w does not calculate ECC<BR>//Raw files are flashed pure using -w. To correct ECC errors use *w instead<BR>// ie: A raw file that has been hex edited can simply be flashed with *w<BR>//<BR>//2.0e<BR>//Fixed the "forced" flash config on command line for virtual nand device.<BR>//<BR>//3.0a<BR>//Requires new v3 .hex for arm<BR>//Suppport added to flash .xsvf files by jtag<BR>//Support added for post monitoring and logging<BR>//</DIV>
<DIV><BR>오랫만에 업데이트 했습니다. </DIV>
<DIV> </DIV>

Lv.7 / 하사 . 전설의게이머 (legend59)

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가 입 일 : 2011-06-19 오후 5:04:41
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